x86info v1.31pre MP Table: # APIC ID Version State Family Model Step Flags # 0 0x15 BSP, usable 0 0 0 0x2e4f0 # 2 0x15 AP, usable 0 0 0 0xf0a4f000 # 4 0x15 AP, usable 0 0 0 0x47000095 # 6 0x15 AP, usable 0 0 8 0x9563 Found 4 identical CPUs Extended Family: 0 Extended Model: 2 Family: 6 Model: 42 Stepping: 7 Type: 0 (Original OEM) CPU Model (x86info's best guess): Core i7 (SandyBridge) Processor name string (BIOS programmed): Intel(R) Core(TM) i5-2550K CPU @ 3.40GHz Performance msrs: MSR_IA32_PERF_STATUS: 0x26e900002200 MSR_IA32_MISC_ENABLE: 0x850089 [Enabled: TCC PerfMon EnhancedSpeedStep ] Thermal msrs: MSR_PM_THERM2_CTL: 0x0 [Thermal monitor: 1] MSR_IA32_THERM_CONTROL: 0x0 [Software-controlled clock disabled (full speed)] MSR_IA32_THERM_STATUS: 0x88460000 Machine check MSRs: Number of reporting banks : 9 Bank: 0 (0x400) MC0CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00011111 MC0STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC0ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 1 (0x404) MC1CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000011 MC1STATUS: 00001001 10000000 00000000 00000000 00000000 00000000 00000000 00000000 MC1ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 2 (0x408) MC2CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000011 MC2STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC2ADDR: Couldn't read MSR 0x40a Bank: 3 (0x40c) MC3CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000111 MC3STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC3ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 4 (0x410) MC4CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000111 MC4STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC4ADDR: Couldn't read MSR 0x412 Bank: 5 (0x414) MC5CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00111111 MC5STATUS: 00000000 00100000 00000000 00000000 00000000 00000000 00000000 00000000 MC5ADDR: 00000000 00000000 00000000 00000000 11111111 01110001 00010101 01000000 Bank: 6 (0x418) MC6CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00111111 MC6STATUS: 00000000 00100000 00000000 00000000 00000000 00000000 00000000 00000000 MC6ADDR: 00000000 00000000 00000000 00000000 11111111 01110001 00010110 00000000 Bank: 7 (0x41c) MC7CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00111111 MC7STATUS: 00000000 00100000 00000000 00000000 00000000 00000000 00000000 00000000 MC7ADDR: 00000000 00000000 00000000 00000000 11111111 01110001 00010101 11000000 Bank: 8 (0x420) MC8CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00111111 MC8STATUS: 00000000 00100000 00000000 00000000 00000000 00000000 00000000 00000000 MC8ADDR: 00000000 00000000 00000000 00000000 11111111 01110001 00010110 10000000 Microcode version: 0x000000000000002f eax in: 0x00000000, eax = 0000000d ebx = 756e6547 ecx = 6c65746e edx = 49656e69 eax in: 0x00000001, eax = 000206a7 ebx = 00100800 ecx = 1f9ae3bf edx = bfebfbff eax in: 0x00000002, eax = 76035a01 ebx = 00f0b0ff ecx = 00000000 edx = 00ca0000 eax in: 0x00000003, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x00000004, eax = 1c004121 ebx = 01c0003f ecx = 0000003f edx = 00000000 eax in: 0x00000005, eax = 00000040 ebx = 00000040 ecx = 00000003 edx = 00001120 eax in: 0x00000006, eax = 00000077 ebx = 00000002 ecx = 00000009 edx = 00000000 eax in: 0x00000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 9c000400 eax in: 0x00000008, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x00000009, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x0000000a, eax = 07300803 ebx = 00000000 ecx = 00000000 edx = 00000603 eax in: 0x0000000b, eax = 00000001 ebx = 00000001 ecx = 00000100 edx = 00000000 eax in: 0x0000000c, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x0000000d, eax = 00000007 ebx = 00000340 ecx = 00000340 edx = 00000000 eax in: 0x80000000, eax = 80000008 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000001, eax = 00000000 ebx = 00000000 ecx = 00000001 edx = 28100800 eax in: 0x80000002, eax = 20202020 ebx = 49202020 ecx = 6c65746e edx = 20295228 eax in: 0x80000003, eax = 65726f43 ebx = 294d5428 ecx = 2d356920 edx = 30353532 eax in: 0x80000004, eax = 5043204b ebx = 20402055 ecx = 30342e33 edx = 007a4847 eax in: 0x80000005, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000006, eax = 00000000 ebx = 00000000 ecx = 01006040 edx = 00000000 eax in: 0x80000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000100 eax in: 0x80000008, eax = 00003024 ebx = 00000000 ecx = 00000000 edx = 00000000 Cache info L1 Data Cache: 32KB, 8-way associative, 64 byte line size L1 Instruction Cache: 32KB, 8-way associative, 64 byte line size L2 Unified Cache: 256KB, 8-way associative, 64 byte line size L3 Unified Cache: 6144KB, 12-way associative, 64 byte line size TLB info Instruction TLB: 2M/4M pages, fully associative, 8 entries Instruction TLB: 4K pages, 4-way associative, 128 entries. Data TLB0: 2MB or 4MB pages, 4-way set associative, 32 entries Data TLB: 4KB pages, 4-way associative, 64 entries Shared L2 TLB: 4KB pages, 4-way associative, 512 entries 64 byte prefetching. Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 pclmuldq dtes64 monitor ds-cpl vmx est tm2 ssse3 cx16 xTPR pdcm pcid sse4_1 sse4_2 popcnt tsc-deadline aes xsave osxsave avx Extended feature flags: SYSCALL xd rdtscp em64t lahf_lm dts ida arat pln ecmd ptm nonstop_tsc Long NOPs supported: yes MTRR registers: MTRRcap (0xfe): 0x0000000000000d0a wc:1 fix:1 vcnt:10 MTRRphysBase0 (0x200): 0x0000000000000006 (physbase:0x000000 type: 0x06 (write-back)) MTRRphysMask0 (0x201): 0x0000000e00000800 (physmask:0xe00000 valid:1) MTRRphysBase1 (0x202): 0x0000000200000006 (physbase:0x200000 type: 0x06 (write-back)) MTRRphysMask1 (0x203): 0x0000000ff0000800 (physmask:0xff0000 valid:1) MTRRphysBase2 (0x204): 0x0000000210000006 (physbase:0x210000 type: 0x06 (write-back)) MTRRphysMask2 (0x205): 0x0000000ff8000800 (physmask:0xff8000 valid:1) MTRRphysBase3 (0x206): 0x0000000218000006 (physbase:0x218000 type: 0x06 (write-back)) MTRRphysMask3 (0x207): 0x0000000ffc000800 (physmask:0xffc000 valid:1) MTRRphysBase4 (0x208): 0x000000021c000006 (physbase:0x21c000 type: 0x06 (write-back)) MTRRphysMask4 (0x209): 0x0000000ffe000800 (physmask:0xffe000 valid:1) MTRRphysBase5 (0x20a): 0x000000021e000006 (physbase:0x21e000 type: 0x06 (write-back)) MTRRphysMask5 (0x20b): 0x0000000fff000800 (physmask:0xfff000 valid:1) MTRRphysBase6 (0x20c): 0x00000000e0000000 (physbase:0x0e0000 type: 0x00 (uncacheable)) MTRRphysMask6 (0x20d): 0x0000000fe0000800 (physmask:0xfe0000 valid:1) MTRRphysBase7 (0x20e): 0x0000000000000000 (physbase:0x000000 type: 0x00 (uncacheable)) MTRRphysMask7 (0x20f): 0x0000000000000000 (physmask:0x000000 valid:0) MTRRfix64K_00000 (0x250): 0x0606060606060606 MTRRfix16K_80000 (0x258): 0x0606060606060606 MTRRfix16K_A0000 (0x259): 0x0000000000000000 MTRRfix4K_C8000 (0x269): 0x0505050505050505 MTRRfix4K_D0000 0x26a: 0x0000000000000000 MTRRfix4K_D8000 0x26b: 0x0000000000000000 MTRRfix4K_E0000 0x26c: 0x0000000000000000 MTRRfix4K_E8000 0x26d: 0x0505050505050505 MTRRfix4K_F0000 0x26e: 0x0505050505050505 MTRRfix4K_F8000 0x26f: 0x0505050505050505 MTRRdefType (0x2ff): 0x0000000000000c00 (fixed-range flag:1 enable flag:1 default type:0x00 (uncacheable)) APIC registers: APIC MSR Base(0x1b): : 0x00000000fee00900 APIC Local ID : 0x00000000 APIC Local Version : 0x01060015 APIC Task Priority : 0x00000000 APIC Arbitration Priority : 0x00000000 APIC Processor Priority : 0x00000000 APIC EOI : 0x00000000 APIC Remote Read : 0x00000000 APIC Logical Destination : 0x00000000 APIC Destination Format : 0xffffffff APIC Spurious Interrupt Vector : 0x000011ff APIC In-Service (ISR0) : 0x00000000 APIC In-Service (ISR1) : 0x00000000 APIC In-Service (ISR2) : 0x00000000 APIC In-Service (ISR3) : 0x00000000 APIC In-Service (ISR4) : 0x00000000 APIC In-Service (ISR5) : 0x00000000 APIC In-Service (ISR6) : 0x00000000 APIC In-Service (ISR7) : 0x00000000 APIC Trigger Mode (TMR0) : 0x00000000 APIC Trigger Mode (TMR1) : 0x00000000 APIC Trigger Mode (TMR2) : 0x00000000 APIC Trigger Mode (TMR3) : 0x00000000 APIC Trigger Mode (TMR4) : 0x00000000 APIC Trigger Mode (TMR5) : 0x00000000 APIC Trigger Mode (TMR6) : 0x00000000 APIC Trigger Mode (TMR7) : 0x00000000 APIC Interrupt Request (IRR00) : 0x00000000 APIC Interrupt Request (IRR01) : 0x00000000 APIC Interrupt Request (IRR02) : 0x00000000 APIC Interrupt Request (IRR03) : 0x00000000 APIC Interrupt Request (IRR04) : 0x00000000 APIC Interrupt Request (IRR05) : 0x00000000 APIC Interrupt Request (IRR06) : 0x00000000 APIC Interrupt Request (IRR07) : 0x00000000 APIC Error Status : 0x00000000 APIC LVT CMCI : 0x000000f2 APIC Interrupt Command (ICR0) : 0x000000f8 APIC Interrupt Command (ICR1) : 0x02000000 APIC LVT Timer : 0x000400ef APIC Thermal Sensor : 0x00010000 APIC LVT Performance Monitoring Counters: 0x00010400 APIC LVT LINT0 : 0x00010700 APIC LVT LINT1 : 0x00000400 APIC LVT Error : 0x000000f0 APIC Initial Count (for Timer) : 0x00000000 APIC Current Count (for Timer) : 0x00000000 APIC Divide Configuration (for Timer) : 0x00000000 Address sizes : 36 bits physical, 48 bits virtual 3.45GHz processor (estimate). Total processor threads: 4 This system has 1 dual-core processor with hyper-threading (2 threads per core) running at an estimated 3.45GHz