Probe #2ff4b42411 of Acer Veriton X2631G V:1.0 Desktop Computer (Veriton X2631G)

Log: x86info

x86info v1.31pre Found 4 identical CPUs Extended Family: 0 Extended Model: 3 Family: 6 Model: 60 Stepping: 3 Type: 0 (Original OEM) CPU Model (x86info's best guess): Xeon E3-1225 v3 [Haswell] Processor name string (BIOS programmed): Intel(R) Core(TM) i5-4460 CPU @ 3.20GHz Performance msrs: MSR_IA32_PERF_STATUS: 0x16c900000800 MSR_IA32_MISC_ENABLE: 0x4000850089 [Enabled: TCC PerfMon EnhancedSpeedStep ] Thermal msrs: MSR_PM_THERM2_CTL: 0x0 [Thermal monitor: 1] MSR_IA32_THERM_CONTROL: 0x0 [Software-controlled clock disabled (full speed)] MSR_IA32_THERM_STATUS: 0x88420000 Machine check MSRs: Number of reporting banks : 9 Bank: 0 (0x400) MC0CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 MC0STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC0ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 1 (0x404) MC1CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 MC1STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC1ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 2 (0x408) MC2CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 MC2STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC2ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 3 (0x40c) MC3CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111 MC3STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC3ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 4 (0x410) MC4CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00111111 MC4STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC4ADDR: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Bank: 5 (0x414) MC5CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 MC5STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC5ADDR: 00000000 00000000 00000000 00000000 11111111 10110000 01111101 00000000 Bank: 6 (0x418) MC6CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 MC6STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC6ADDR: 00000000 00000000 00000000 00000000 11111111 10110000 01111110 01000000 Bank: 7 (0x41c) MC7CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 MC7STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC7ADDR: 00000000 00000000 00000000 00000000 11111111 10110000 01111110 10000000 Bank: 8 (0x420) MC8CTL: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 11111111 MC8STATUS: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 MC8ADDR: 00000000 00000000 00000000 00000000 11111111 10110000 01111110 11000000 Microcode version: 0x0000000000000028 eax in: 0x00000000, eax = 0000000d ebx = 756e6547 ecx = 6c65746e edx = 49656e69 eax in: 0x00000001, eax = 000306c3 ebx = 00100800 ecx = 7ffafbbf edx = bfebfbff eax in: 0x00000002, eax = 76036301 ebx = 00f0b6ff ecx = 00000000 edx = 00c10000 eax in: 0x00000003, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x00000004, eax = 1c004121 ebx = 01c0003f ecx = 0000003f edx = 00000000 eax in: 0x00000005, eax = 00000040 ebx = 00000040 ecx = 00000003 edx = 00042120 eax in: 0x00000006, eax = 00000075 ebx = 00000002 ecx = 00000009 edx = 00000000 eax in: 0x00000007, eax = 00000000 ebx = 000027ab ecx = 00000000 edx = 9c000600 eax in: 0x00000008, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x00000009, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x0000000a, eax = 07300803 ebx = 00000000 ecx = 00000000 edx = 00000603 eax in: 0x0000000b, eax = 00000001 ebx = 00000001 ecx = 00000100 edx = 00000000 eax in: 0x0000000c, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x0000000d, eax = 00000007 ebx = 00000340 ecx = 00000340 edx = 00000000 eax in: 0x80000000, eax = 80000008 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000001, eax = 00000000 ebx = 00000000 ecx = 00000021 edx = 2c100800 eax in: 0x80000002, eax = 65746e49 ebx = 2952286c ecx = 726f4320 edx = 4d542865 eax in: 0x80000003, eax = 35692029 ebx = 3634342d ecx = 43202030 edx = 40205550 eax in: 0x80000004, eax = 322e3320 ebx = 7a484730 ecx = 00000000 edx = 00000000 eax in: 0x80000005, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000006, eax = 00000000 ebx = 00000000 ecx = 01006040 edx = 00000000 eax in: 0x80000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000100 eax in: 0x80000008, eax = 00003027 ebx = 00000000 ecx = 00000000 edx = 00000000 Cache info L1 Data Cache: 32KB, 8-way associative, 64 byte line size L1 Instruction Cache: 32KB, 8-way associative, 64 byte line size L2 Unified Cache: 256KB, 8-way associative, 64 byte line size L3 Unified Cache: 6144KB, 12-way associative, 64 byte line size TLB info Instruction TLB: 2M/4M pages, fully associative, 8 entries Instruction TLB: 4K pages, 8-way associative, 128 entries Data TLB: 1GB pages, 4-way set associative, 4 entries Data TLB: 4KB pages, 4-way associative, 64 entries Shared L2 TLB: 4KB/2MB pages, 8-way associative, 1024 entries 64 byte prefetching. Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 pclmuldq dtes64 monitor ds-cpl vmx est tm2 ssse3 sdbg fma cx16 xTPR pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc-deadline aes xsave osxsave avx f16c rdrnd Extended feature flags: SYSCALL xd pdpe1gb rdtscp em64t lahf_lm lzcnt dts arat pln ecmd ptm fsgsbase tsc_adj bmi1 avx2 smep bmi2 erms invpcid nofpucs nonstop_tsc Long NOPs supported: yes MTRR registers: MTRRcap (0xfe): 0x0000000000000d0a wc:1 fix:1 vcnt:10 MTRRphysBase0 (0x200): 0x0000000000000006 (physbase:0x000000 type: 0x06 (write-back)) MTRRphysMask0 (0x201): 0x0000007f00000800 (physmask:0xf00000 valid:1) MTRRphysBase1 (0x202): 0x0000000100000006 (physbase:0x100000 type: 0x06 (write-back)) MTRRphysMask1 (0x203): 0x0000007fe0000800 (physmask:0xfe0000 valid:1) MTRRphysBase2 (0x204): 0x00000000e0000000 (physbase:0x0e0000 type: 0x00 (uncacheable)) MTRRphysMask2 (0x205): 0x0000007fe0000800 (physmask:0xfe0000 valid:1) MTRRphysBase3 (0x206): 0x00000000d8000000 (physbase:0x0d8000 type: 0x00 (uncacheable)) MTRRphysMask3 (0x207): 0x0000007ff8000800 (physmask:0xff8000 valid:1) MTRRphysBase4 (0x208): 0x00000000d7000000 (physbase:0x0d7000 type: 0x00 (uncacheable)) MTRRphysMask4 (0x209): 0x0000007fff000800 (physmask:0xfff000 valid:1) MTRRphysBase5 (0x20a): 0x000000011fe00000 (physbase:0x11fe00 type: 0x00 (uncacheable)) MTRRphysMask5 (0x20b): 0x0000007fffe00800 (physmask:0xfffe00 valid:1) MTRRphysBase6 (0x20c): 0x0000000000000000 (physbase:0x000000 type: 0x00 (uncacheable)) MTRRphysMask6 (0x20d): 0x0000000000000000 (physmask:0x000000 valid:0) MTRRphysBase7 (0x20e): 0x0000000000000000 (physbase:0x000000 type: 0x00 (uncacheable)) MTRRphysMask7 (0x20f): 0x0000000000000000 (physmask:0x000000 valid:0) MTRRfix64K_00000 (0x250): 0x0606060606060606 MTRRfix16K_80000 (0x258): 0x0606060606060606 MTRRfix16K_A0000 (0x259): 0x0000000000000000 MTRRfix4K_C8000 (0x269): 0x0000000000000000 MTRRfix4K_D0000 0x26a: 0x0000000000000000 MTRRfix4K_D8000 0x26b: 0x0000000000000000 MTRRfix4K_E0000 0x26c: 0x0000000000000000 MTRRfix4K_E8000 0x26d: 0x0000000000000000 MTRRfix4K_F0000 0x26e: 0x0505050505050505 MTRRfix4K_F8000 0x26f: 0x0505050505050505 MTRRdefType (0x2ff): 0x0000000000000c00 (fixed-range flag:1 enable flag:1 default type:0x00 (uncacheable)) APIC registers: APIC MSR Base(0x1b): : 0x00000000fee00d00 APIC Local ID : 0xffffffff APIC Local Version : 0xffffffff APIC Task Priority : 0xffffffff APIC Arbitration Priority : 0xffffffff APIC Processor Priority : 0xffffffff APIC EOI : 0xffffffff APIC Remote Read : 0xffffffff APIC Logical Destination : 0xffffffff APIC Destination Format : 0xffffffff APIC Spurious Interrupt Vector : 0xffffffff APIC In-Service (ISR0) : 0xffffffff APIC In-Service (ISR1) : 0xffffffff APIC In-Service (ISR2) : 0xffffffff APIC In-Service (ISR3) : 0xffffffff APIC In-Service (ISR4) : 0xffffffff APIC In-Service (ISR5) : 0xffffffff APIC In-Service (ISR6) : 0xffffffff APIC In-Service (ISR7) : 0xffffffff APIC Trigger Mode (TMR0) : 0xffffffff APIC Trigger Mode (TMR1) : 0xffffffff APIC Trigger Mode (TMR2) : 0xffffffff APIC Trigger Mode (TMR3) : 0xffffffff APIC Trigger Mode (TMR4) : 0xffffffff APIC Trigger Mode (TMR5) : 0xffffffff APIC Trigger Mode (TMR6) : 0xffffffff APIC Trigger Mode (TMR7) : 0xffffffff APIC Interrupt Request (IRR00) : 0xffffffff APIC Interrupt Request (IRR01) : 0xffffffff APIC Interrupt Request (IRR02) : 0xffffffff APIC Interrupt Request (IRR03) : 0xffffffff APIC Interrupt Request (IRR04) : 0xffffffff APIC Interrupt Request (IRR05) : 0xffffffff APIC Interrupt Request (IRR06) : 0xffffffff APIC Interrupt Request (IRR07) : 0xffffffff APIC Error Status : 0xffffffff APIC LVT CMCI : 0xffffffff APIC Interrupt Command (ICR0) : 0xffffffff APIC Interrupt Command (ICR1) : 0xffffffff APIC LVT Timer : 0xffffffff APIC Thermal Sensor : 0xffffffff APIC LVT Performance Monitoring Counters: 0xffffffff APIC LVT LINT0 : 0xffffffff APIC LVT LINT1 : 0xffffffff APIC LVT Error : 0xffffffff APIC Initial Count (for Timer) : 0xffffffff APIC Current Count (for Timer) : 0xffffffff APIC Divide Configuration (for Timer) : 0xffffffff Address sizes : 39 bits physical, 48 bits virtual 3.20GHz processor (estimate). Total processor threads: 4 This system has 1 dual-core processor with hyper-threading (2 threads per core) running at an estimated 3.20GHz


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