x86info v1.31pre Found 2 identical CPUs Extended Family: 0 Extended Model: 4 Family: 15 Model: 75 Stepping: 2 CPU Model (x86info's best guess): Athlon 64 X2 Dual-Core (BH-F2) Processor name string (BIOS programmed): AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ Number of reporting banks : 5 MCG_CTL: Data cache check enabled ECC 1 bit error reporting enabled ECC multi bit error reporting enabled Data cache data parity enabled Data cache main tag parity enabled Data cache snoop tag parity enabled L1 TLB parity enabled L2 TLB parity enabled Instruction cache check enabled ECC 1 bit error reporting enabled ECC multi bit error reporting enabled Instruction cache data parity enabled IC main tag parity enabled IC snoop tag parity enabled L1 TLB parity enabled L2 TLB parity enabled Predecode array parity enabled Target selector parity enabled Read data error enabled Bus unit check enabled External L2 tag parity error enabled L2 partial tag parity error enabled System ECC TLB reload error enabled L2 ECC TLB reload error enabled L2 ECC K7 deallocate enabled L2 ECC probe deallocate enabled System datareaderror reporting enabled Load/Store unit check enabled Read data error enable (loads) enabled Read data error enable (stores) enabled 31 23 15 7 Bank: 0 (0x400) MC0CTL: 00000000 00000000 00000000 01111111 MC0STATUS: 00000000 00000000 00000000 00000000 MC0ADDR: 11000001 00000110 00010110 10100110 MC0MISC: 00000000 00000000 00000000 00000000 Bank: 1 (0x404) MC1CTL: 11111111 11111111 11111111 11111111 MC1STATUS: 00000000 00000000 00000000 00000000 MC1ADDR: 00000101 11111111 01000000 11111011 MC1MISC: 00000000 00000000 00000000 00000000 Bank: 2 (0x408) MC2CTL: 00000000 00001111 11111111 11111111 MC2STATUS: 00000000 00000000 00000000 00000000 MC2ADDR: 00100100 00000001 11011001 00000110 MC2MISC: 00100100 00000001 11011001 00000110 Bank: 3 (0x40c) MC3CTL: 00000000 00000000 00000000 00000111 MC3STATUS: 00000000 00000000 00000000 00000000 MC3ADDR: 11010010 00110011 01111011 11010111 MC3MISC: 00000000 00000000 00000000 00000000 Bank: 4 (0x410) MC4CTL: 00000000 00000100 00111011 11111111 MC4STATUS: 00000000 00000000 00000000 00000000 MC4ADDR: 00000000 00000000 00000000 00000000 MC4MISC: 00000000 00000000 00000000 00000000 Microcode patch level: 0x68 PowerNOW! Technology information Available features: Temperature sensing diode present. Frequency ID control Voltage ID control Thermal Trip Thermal Monitoring Software Thermal Control MSR: 0xc0010041=0x0000000100000c0c : 00000000 00000000 00000000 00000001 00000000 00000000 00001100 00001100 MSR: 0xc0010042=0x310a120c0a0c020c : 00110001 00001010 00010010 00001100 00001010 00001100 00000010 00001100 Voltage ID codes: Maximum=1.300V Startup=1.100V Currently=1.250V Frequency ID codes: Maximum=10x Startup=5x Currently=10x SVM: revision 1, 64 ASIDs Address Size: 48 bits virtual, 40 bits physical The physical package has 2 of 2 possible cores implemented. eax in: 0x00000000, eax = 00000001 ebx = 68747541 ecx = 444d4163 edx = 69746e65 eax in: 0x00000001, eax = 00040fb2 ebx = 00020800 ecx = 00002001 edx = 178bfbff eax in: 0x80000000, eax = 80000018 ebx = 68747541 ecx = 444d4163 edx = 69746e65 eax in: 0x80000001, eax = 00040fb2 ebx = 000008cd ecx = 0000001f edx = ebd3fbff eax in: 0x80000002, eax = 20444d41 ebx = 6c687441 ecx = 74286e6f edx = 3620296d eax in: 0x80000003, eax = 32582034 ebx = 61754420 ecx = 6f43206c edx = 50206572 eax in: 0x80000004, eax = 65636f72 ebx = 726f7373 ecx = 30383320 edx = 00002b30 eax in: 0x80000005, eax = ff08ff08 ebx = ff20ff20 ecx = 40020140 edx = 40020140 eax in: 0x80000006, eax = 00000000 ebx = 42004200 ecx = 02008140 edx = 00000000 eax in: 0x80000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 0000003f eax in: 0x80000008, eax = 00003028 ebx = 00000000 ecx = 00000001 edx = 00000000 eax in: 0x80000009, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x8000000a, eax = 00000001 ebx = 00000040 ecx = 00000000 edx = 00000000 eax in: 0x8000000b, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x8000000c, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x8000000d, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x8000000e, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x8000000f, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000010, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000011, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000012, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000013, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000014, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000015, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000016, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000017, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 eax in: 0x80000018, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000 L1 Data TLB (2M/4M): Fully associative. 8 entries. L1 Instruction TLB (2M/4M): Fully associative. 8 entries. L1 Data TLB (4K): Fully associative. 32 entries. L1 Instruction TLB (4K): Fully associative. 32 entries. L1 Data cache: Size: 64Kb 2-way associative. lines per tag=1 line size=64 bytes. L1 Instruction cache: Size: 64Kb 2-way associative. lines per tag=1 line size=64 bytes. L2 Data TLB (2M/4M): Disabled. 0 entries. L2 Instruction TLB (2M/4M): Disabled. 0 entries. L2 Data TLB (4K): 4-way associative. 512 entries. L2 Instruction TLB (4K): 4-way associative. 512 entries. L2 cache: Size: 512Kb 16-way associative. lines per tag=1 line size=64 bytes. Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh mmx fxsr sse sse2 ht sse3 cmpxchg16b Extended feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 nx mmxext mmx fxsr ffxsr rdtscp lm 3dnowext 3dnow lahf/sahf CmpLegacy svm ExtApicSpace LockMovCr0 Long NOPs supported: yes Connector type: Socket AM2 MTRR registers: MTRRcap (0xfe): 0x0000000000000508 wc:1 fix:1 vcnt:8 MTRRphysBase0 (0x200): 0x0000000000000006 (physbase:0x0000000 type: 0x06 (write-back)) MTRRphysMask0 (0x201): 0x000000ff80000800 (physmask:0xff80000 valid:1) MTRRphysBase1 (0x202): 0x0000000080000006 (physbase:0x0080000 type: 0x06 (write-back)) MTRRphysMask1 (0x203): 0x000000ffc0000800 (physmask:0xffc0000 valid:1) MTRRphysBase2 (0x204): 0x00000000c0000006 (physbase:0x00c0000 type: 0x06 (write-back)) MTRRphysMask2 (0x205): 0x000000fff0000800 (physmask:0xfff0000 valid:1) MTRRphysBase3 (0x206): 0x00000000d0000006 (physbase:0x00d0000 type: 0x06 (write-back)) MTRRphysMask3 (0x207): 0x000000fff8000800 (physmask:0xfff8000 valid:1) MTRRphysBase4 (0x208): 0x0000000100000006 (physbase:0x0100000 type: 0x06 (write-back)) MTRRphysMask4 (0x209): 0x000000ffe0000800 (physmask:0xffe0000 valid:1) MTRRphysBase5 (0x20a): 0x0000000120000006 (physbase:0x0120000 type: 0x06 (write-back)) MTRRphysMask5 (0x20b): 0x000000fffc000800 (physmask:0xfffc000 valid:1) MTRRphysBase6 (0x20c): 0x0000000124000006 (physbase:0x0124000 type: 0x06 (write-back)) MTRRphysMask6 (0x20d): 0x000000fffe000800 (physmask:0xfffe000 valid:1) MTRRphysBase7 (0x20e): 0x0000000000000000 (physbase:0x0000000 type: 0x00 (uncacheable)) MTRRphysMask7 (0x20f): 0x0000000000000000 (physmask:0x0000000 valid:0) MTRRfix64K_00000 (0x250): 0x0606060606060606 MTRRfix16K_80000 (0x258): 0x0606060606060606 MTRRfix16K_A0000 (0x259): 0x0000000000000000 MTRRfix4K_C8000 (0x269): 0x0505050505050505 MTRRfix4K_D0000 0x26a: 0x0505050505050505 MTRRfix4K_D8000 0x26b: 0x0505050505050505 MTRRfix4K_E0000 0x26c: 0x0606060605050505 MTRRfix4K_E8000 0x26d: 0x0606060606060606 MTRRfix4K_F0000 0x26e: 0x0505050505050505 MTRRfix4K_F8000 0x26f: 0x0505050505050505 MTRRdefType (0x2ff): 0x0000000000000c00 (fixed-range flag:1 enable flag:1 default type:0x00 (uncacheable)) APIC registers: APIC MSR Base(0x1b): : 0x00000000fee00900 APIC Local ID : 0x00000000 APIC Local Version : 0x80050010 APIC Task Priority : 0x00000000 APIC Arbitration Priority : 0x00000000 APIC Processor Priority : 0x00000000 APIC EOI : 0x00000000 APIC Remote Read : 0x00000002 APIC Logical Destination : 0x00000000 APIC Destination Format : 0xffffffff APIC Spurious Interrupt Vector : 0x000001ff APIC In-Service (ISR0) : 0x00000000 APIC In-Service (ISR1) : 0x00000000 APIC In-Service (ISR2) : 0x00000000 APIC In-Service (ISR3) : 0x00000000 APIC In-Service (ISR4) : 0x00000000 APIC In-Service (ISR5) : 0x00000000 APIC In-Service (ISR6) : 0x00000000 APIC In-Service (ISR7) : 0x00000000 APIC Trigger Mode (TMR0) : 0x00000000 APIC Trigger Mode (TMR1) : 0x00000000 APIC Trigger Mode (TMR2) : 0x00000000 APIC Trigger Mode (TMR3) : 0x00000000 APIC Trigger Mode (TMR4) : 0x00000000 APIC Trigger Mode (TMR5) : 0x00000000 APIC Trigger Mode (TMR6) : 0x00000000 APIC Trigger Mode (TMR7) : 0x00000000 APIC Interrupt Request (IRR00) : 0x00000000 APIC Interrupt Request (IRR01) : 0x00000000 APIC Interrupt Request (IRR02) : 0x00000000 APIC Interrupt Request (IRR03) : 0x00000000 APIC Interrupt Request (IRR04) : 0x00000000 APIC Interrupt Request (IRR05) : 0x00000000 APIC Interrupt Request (IRR06) : 0x00000000 APIC Interrupt Request (IRR07) : 0x00000000 APIC Error Status : 0x00000000 APIC LVT CMCI : 0x00000000 APIC Interrupt Command (ICR0) : 0x000040f8 APIC Interrupt Command (ICR1) : 0x01000000 APIC LVT Timer : 0x000000ef APIC Thermal Sensor : 0x00010000 APIC LVT Performance Monitoring Counters: 0x00010400 APIC LVT LINT0 : 0x00010700 APIC LVT LINT1 : 0x00000400 APIC LVT Error : 0x000000f0 APIC Initial Count (for Timer) : 0x000184e0 APIC Current Count (for Timer) : 0x0000a064 APIC Divide Configuration (for Timer) : 0x00000000 Address sizes : 40 bits physical, 48 bits virtual 2.00GHz processor (estimate). running at an estimated 2.00GHz