Probe #bc31c4707c of ASUSTek K52F

Log: pciconf

hostb0@pci0:0:0:0: class=0x060000 rev=0x18 hdr=0x00 vendor=0x8086 device=0x0044 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = 'Core Processor DRAM Controller' class = bridge subclass = HOST-PCI cap 09[e0] = vendor (length 12) Intel cap 0 version 1 vgapci0@pci0:0:2:0: class=0x030000 rev=0x18 hdr=0x00 vendor=0x8086 device=0x0046 subvendor=0x1043 subdevice=0x1be2 vendor = 'Intel Corporation' device = 'Core Processor Integrated Graphics Controller' class = display subclass = VGA bar [10] = type Memory, range 64, base 0xd0000000, size 4194304, enabled bar [18] = type Prefetchable Memory, range 64, base 0xc0000000, size 268435456, enabled bar [20] = type I/O Port, range 32, base 0xe080, size 8, enabled cap 05[90] = MSI supports 1 message enabled with 1 message cap 01[d0] = powerspec 2 supports D0 D3 current D0 cap 13[a4] = PCI Advanced Features: FLR TP none0@pci0:0:22:0: class=0x078000 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b64 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset HECI Controller' class = simple comms bar [10] = type Memory, range 64, base 0xd540a000, size 16, enabled cap 01[50] = powerspec 3 supports D0 D3 current D0 cap 05[8c] = MSI supports 1 message, 64 bit ehci0@pci0:0:26:0: class=0x0c0320 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b3c subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset USB2 Enhanced Host Controller' class = serial bus subclass = USB bar [10] = type Memory, range 32, base 0xd5408000, size 1024, enabled cap 01[50] = powerspec 2 supports D0 D3 current D0 cap 0a[58] = EHCI Debug Port at offset 0xa0 in map 0x14 cap 13[98] = PCI Advanced Features: FLR TP hdac0@pci0:0:27:0: class=0x040300 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b56 subvendor=0x1043 subdevice=0x13f3 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset High Definition Audio' class = multimedia subclass = HDA bar [10] = type Memory, range 64, base 0xd5400000, size 16384, enabled cap 01[50] = powerspec 2 supports D0 D3 current D0 cap 05[60] = MSI supports 1 message, 64 bit enabled with 1 message cap 10[70] = PCI-Express 1 root endpoint max data 128(128) FLR NS max read 128 ecap 0002[100] = VC 1 max VC1 ecap 0005[130] = Root Complex Link Declaration 1 pcib1@pci0:0:28:0: class=0x060400 rev=0x06 hdr=0x01 vendor=0x8086 device=0x3b42 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset PCI Express Root Port 1' class = bridge subclass = PCI-PCI cap 10[40] = PCI-Express 2 root port max data 128(128) max read 128 link x0(x1) speed 0.0(2.5) ASPM L0s/L1(L0s/L1) slot 0 power limit 100 mW HotPlug(empty) surprise cap 05[80] = MSI supports 1 message enabled with 1 message cap 0d[90] = PCI Bridge subvendor=0x1043 subdevice=0x1f27 cap 01[a0] = powerspec 2 supports D0 D3 current D0 pcib2@pci0:0:28:1: class=0x060400 rev=0x06 hdr=0x01 vendor=0x8086 device=0x3b44 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset PCI Express Root Port 2' class = bridge subclass = PCI-PCI cap 10[40] = PCI-Express 2 root port max data 128(128) max read 128 link x1(x1) speed 2.5(2.5) ASPM L0s/L1(L0s/L1) slot 1 power limit 100 mW HotPlug(present) surprise cap 05[80] = MSI supports 1 message enabled with 1 message cap 0d[90] = PCI Bridge subvendor=0x1043 subdevice=0x1f27 cap 01[a0] = powerspec 2 supports D0 D3 current D0 pcib3@pci0:0:28:2: class=0x060400 rev=0x06 hdr=0x01 vendor=0x8086 device=0x3b46 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset PCI Express Root Port 3' class = bridge subclass = PCI-PCI cap 10[40] = PCI-Express 2 root port max data 128(128) max read 128 link x0(x1) speed 0.0(2.5) ASPM L0s/L1(L0s/L1) slot 2 power limit 100 mW HotPlug(empty) surprise cap 05[80] = MSI supports 1 message enabled with 1 message cap 0d[90] = PCI Bridge subvendor=0x1043 subdevice=0x1f27 cap 01[a0] = powerspec 2 supports D0 D3 current D0 pcib4@pci0:0:28:5: class=0x060400 rev=0x06 hdr=0x01 vendor=0x8086 device=0x3b4c subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset PCI Express Root Port 6' class = bridge subclass = PCI-PCI cap 10[40] = PCI-Express 2 root port max data 128(128) max read 128 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) slot 5 power limit 100 mW HotPlug(present) surprise cap 05[80] = MSI supports 1 message enabled with 1 message cap 0d[90] = PCI Bridge subvendor=0x1043 subdevice=0x1f27 cap 01[a0] = powerspec 2 supports D0 D3 current D0 ehci1@pci0:0:29:0: class=0x0c0320 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b34 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset USB2 Enhanced Host Controller' class = serial bus subclass = USB bar [10] = type Memory, range 32, base 0xd5407000, size 1024, enabled cap 01[50] = powerspec 2 supports D0 D3 current D0 cap 0a[58] = EHCI Debug Port at offset 0xa0 in map 0x14 cap 13[98] = PCI Advanced Features: FLR TP pcib5@pci0:0:30:0: class=0x060401 rev=0xa6 hdr=0x01 vendor=0x8086 device=0x2448 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '82801 Mobile PCI Bridge' class = bridge subclass = PCI-PCI cap 0d[50] = PCI Bridge subvendor=0x1043 subdevice=0x1f27 isab0@pci0:0:31:0: class=0x060100 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b09 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = 'HM55 Chipset LPC Interface Controller' class = bridge subclass = PCI-ISA cap 09[e0] = vendor (length 16) Intel cap 1 version 1 ahci0@pci0:0:31:2: class=0x010601 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b29 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset 4 port SATA AHCI Controller' class = mass storage subclass = SATA bar [10] = type I/O Port, range 32, base 0xe070, size 8, enabled bar [14] = type I/O Port, range 32, base 0xe060, size 4, enabled bar [18] = type I/O Port, range 32, base 0xe050, size 8, enabled bar [1c] = type I/O Port, range 32, base 0xe040, size 4, enabled bar [20] = type I/O Port, range 32, base 0xe020, size 32, enabled bar [24] = type Memory, range 32, base 0xd5406000, size 2048, enabled cap 05[80] = MSI supports 1 message enabled with 1 message cap 01[70] = powerspec 3 supports D0 D3 current D0 cap 12[a8] = SATA Index-Data Pair cap 13[b0] = PCI Advanced Features: FLR TP ichsmb0@pci0:0:31:3: class=0x0c0500 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b30 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset SMBus Controller' class = serial bus subclass = SMBus bar [10] = type Memory, range 64, base 0xd5405000, size 256, enabled bar [20] = type I/O Port, range 32, base 0xe000, size 32, enabled none1@pci0:0:31:6: class=0x118000 rev=0x06 hdr=0x00 vendor=0x8086 device=0x3b32 subvendor=0x1043 subdevice=0x1f27 vendor = 'Intel Corporation' device = '5 Series/3400 Series Chipset Thermal Subsystem' class = dasp bar [10] = type Memory, range 64, base 0xd5404000, size 4096, enabled cap 01[50] = powerspec 3 supports D0 D3 current D0 cap 05[80] = MSI supports 1 message none2@pci0:2:0:0: class=0x028000 rev=0x01 hdr=0x00 vendor=0x14e4 device=0x4727 subvendor=0x103c subdevice=0x145c vendor = 'Broadcom Inc. and subsidiaries' device = 'BCM4313 802.11bgn Wireless Network Adapter' class = network bar [10] = type Memory, range 64, base 0xd2c00000, size 16384, enabled cap 01[40] = powerspec 3 supports D0 D1 D2 D3 current D0 cap 09[58] = vendor (length 120) cap 05[48] = MSI supports 1 message, 64 bit cap 10[d0] = PCI-Express 1 endpoint max data 128(128) max read 128 link x1(x1) speed 2.5(2.5) ASPM L0s/L1(L0s/L1) ClockPM enabled ecap 0001[100] = AER 1 0 fatal 0 non-fatal 2 corrected ecap 0002[13c] = VC 1 max VC0 ecap 0003[160] = Serial 1 000012ffff64ac81 ecap 0004[16c] = Power Budgeting 1 none3@pci0:4:0:0: class=0x088000 rev=0x80 hdr=0x00 vendor=0x197b device=0x2382 subvendor=0x1043 subdevice=0x1a07 vendor = 'JMicron Technology Corp.' device = 'SD/MMC Host Controller' class = base peripheral bar [10] = type Memory, range 32, base 0xd0407000, size 256, enabled cap 01[a4] = powerspec 3 supports D0 D3 current D0 cap 10[80] = PCI-Express 1 endpoint max data 128(128) RO max read 128 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) cap 05[94] = MSI supports 1 message sdhci_pci0@pci0:4:0:2: class=0x080501 rev=0x80 hdr=0x00 vendor=0x197b device=0x2381 subvendor=0x1043 subdevice=0x1a07 vendor = 'JMicron Technology Corp.' device = 'Standard SD Host Controller' class = base peripheral subclass = SD host controller bar [10] = type Memory, range 32, base 0xd0406000, size 256, enabled cap 01[a4] = powerspec 3 supports D0 D3 current D0 cap 10[80] = PCI-Express 1 endpoint max data 128(128) RO max read 128 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) cap 05[94] = MSI supports 1 message enabled with 1 message none4@pci0:4:0:3: class=0x088000 rev=0x80 hdr=0x00 vendor=0x197b device=0x2383 subvendor=0x1043 subdevice=0x1a07 vendor = 'JMicron Technology Corp.' device = 'MS Host Controller' class = base peripheral bar [10] = type Memory, range 32, base 0xd0405000, size 256, enabled cap 01[a4] = powerspec 3 supports D0 D3 current D0 cap 10[80] = PCI-Express 1 endpoint max data 128(128) RO max read 128 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) cap 05[94] = MSI supports 1 message none5@pci0:4:0:4: class=0x088000 rev=0x80 hdr=0x00 vendor=0x197b device=0x2384 subvendor=0x1043 subdevice=0x1a07 vendor = 'JMicron Technology Corp.' device = 'xD Host Controller' class = base peripheral bar [10] = type Memory, range 32, base 0xd0404000, size 256, enabled cap 01[a4] = powerspec 3 supports D0 D3 current D0 cap 10[80] = PCI-Express 1 endpoint max data 128(128) RO max read 128 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) cap 05[94] = MSI supports 1 message jme0@pci0:4:0:5: class=0x020000 rev=0x03 hdr=0x00 vendor=0x197b device=0x0250 subvendor=0x1043 subdevice=0x1905 vendor = 'JMicron Technology Corp.' device = 'JMC250 PCI Express Gigabit Ethernet Controller' class = network subclass = ethernet bar [10] = type Memory, range 32, base 0xd0400000, size 16384, enabled bar [18] = type I/O Port, range 32, base 0xa100, size 128, enabled bar [1c] = type I/O Port, range 32, base 0xa000, size 256, enabled cap 01[68] = powerspec 3 supports D0 D3 current D0 cap 10[50] = PCI-Express 1 legacy endpoint max data 128(128) max read 512 link x1(x1) speed 2.5(2.5) ASPM disabled(L0s/L1) cap 11[40] = MSI-X supports 8 messages, enabled Table in map 0x10[0x2000], PBA in map 0x10[0x3000] cap 05[70] = MSI supports 8 messages, 64 bit, vector masks hostb1@pci0:255:0:0: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2c62 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = 'Core Processor QuickPath Architecture Generic Non-core Registers' class = bridge subclass = HOST-PCI hostb2@pci0:255:0:1: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2d01 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = 'Core Processor QuickPath Architecture System Address Decoder' class = bridge subclass = HOST-PCI hostb3@pci0:255:2:0: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2d10 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = 'Core Processor QPI Link 0' class = bridge subclass = HOST-PCI hostb4@pci0:255:2:1: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2d11 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = '1st Generation Core i3/5/7 Processor QPI Physical 0' class = bridge subclass = HOST-PCI hostb5@pci0:255:2:2: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2d12 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = '1st Generation Core i3/5/7 Processor Reserved' class = bridge subclass = HOST-PCI hostb6@pci0:255:2:3: class=0x060000 rev=0x05 hdr=0x00 vendor=0x8086 device=0x2d13 subvendor=0x8086 subdevice=0x8086 vendor = 'Intel Corporation' device = '1st Generation Core i3/5/7 Processor Reserved' class = bridge subclass = HOST-PCI


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