eax in eax ebx ecx edx 00000000 00000006 68747541 444d4163 69746e65 00000001 00100fa0 05060800 00802009 178bfbff 00000002 00000000 00000000 00000000 00000000 00000003 00000000 00000000 00000000 00000000 00000004 00000000 00000000 00000000 00000000 00000005 00000040 00000040 00000003 00000000 00000006 00000000 00000000 00000001 00000000 80000000 8000001b 68747541 444d4163 69746e65 80000001 00100fa0 10000091 000837ff efd3fbff 80000002 20444d41 6e656850 74286d6f 4920296d 80000003 36582049 39303120 50205430 65636f72 80000004 726f7373 00000000 00000000 00000000 80000005 ff30ff10 ff30ff20 40020140 40020140 80000006 20800000 42004200 02008140 0030b140 80000007 00000000 00000000 00000000 000003f9 80000008 00003030 00000000 00003005 00000000 80000009 00000000 00000000 00000000 00000000 8000000a 00000001 00000040 00000000 0000040f 8000000b 00000000 00000000 00000000 00000000 8000000c 00000000 00000000 00000000 00000000 8000000d 00000000 00000000 00000000 00000000 8000000e 00000000 00000000 00000000 00000000 8000000f 00000000 00000000 00000000 00000000 80000010 00000000 00000000 00000000 00000000 80000011 00000000 00000000 00000000 00000000 80000012 00000000 00000000 00000000 00000000 80000013 00000000 00000000 00000000 00000000 80000014 00000000 00000000 00000000 00000000 80000015 00000000 00000000 00000000 00000000 80000016 00000000 00000000 00000000 00000000 80000017 00000000 00000000 00000000 00000000 80000018 00000000 00000000 00000000 00000000 80000019 f0300000 60100000 00000000 00000000 8000001a 00000003 00000000 00000000 00000000 8000001b 0000001f 00000000 00000000 00000000 Vendor ID: "AuthenticAMD"; CPUID level 6 AMD-specific functions Version 00100fa0: Family: 15 Model: 10 [] Standard feature flags 178bfbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions PAT Page Attribute Table PSE36 36-bit Page Size Extension CLFSH CLFLUSH instruction MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE SSE extensions SSE2 SSE2 extensions HTT Hyper-Threading Technology Generation: 15 Model: 10 Extended feature flags efd3fbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions PAT Page Attribute Table PSE36 36-bit Page Size Extension NX No-execute page protection MmxExt MMX instruction extensions MMX MMX instructions FXSR Fast FP/MMX Streaming SIMD Extensions save/restore FFXSR FXSAVE and FXRSTOR instruction optimizations Pge1GB 1GB Page Support RDTSCP RDTSCP instruction LM 64 bit long mode 3DNowE 3DNow! instruction extensions 3DNow 3DNow! instructions Extended Miscellaneous feature flags 000837ff: LhfSaf LAHF and SAHF instructions in 65-bit mode CmpLeg Core Multi-Processing mode SVM Secure Virtual Machine XAPSPC Extended APIC Register Space AltMC8 LOCK MOV CR0 means MOV CR8 ABM Advanced Bit Manipulation SSE4A EXTRQ, INSERTQ, MOVNTSS, and MOVNTSD support MASSE Misaligned SSE mode 3DNPFC PREFETCH and PREFETCHW support OSVW OS Visible Workaround support 10 Reserved SKINIT SKINIT, STGI, and DEV support WDT Watchdog Timer support14 Reserved 20 Reserved Processor name string: AMD Phenom(tm) II X6 1090T Processor L1 Cache Information: 2/4-MB Pages: Data TLB: associativity 255-way #entries 48 Instruction TLB: associativity 255-way #entries 16 4-KB Pages: Data TLB: associativity 255-way #entries 48 Instruction TLB: associativity 255-way #entries 32 L1 Data cache: size 64 KB associativity 2-way lines per tag 1 line size 64 L1 Instruction cache: size 64 KB associativity 2-way lines per tag 1 line size 64 L2 Cache Information: 2/4-MB Pages: Data TLB: associativity L2 off #entries 128 Instruction TLB: associativity L2 off #entries 0 4-KB Pages: Data TLB: associativity 2-way #entries 0 Instruction TLB: associativity 2-way #entries 0 size 2 KB associativity L2 off lines per tag 129 line size 64 Advanced Power Management Feature Flags Has temperature sensing diode Maximum linear address: 48; maximum phys address 48